In the semiconductor industry, devices are becoming smaller and components, e.g. control electrodes, contact electrodes, gates, etc., within the devices are so small they are very difficult to fabricate. Side wall spacers have found some limited use in various manufacturing processes. The most typical application of side wall spacers is to space heavily doped regions away from the gate electrode of a transistor via the so called "self-aligned" implant process. In this process a gate is formed and side wall spacers are formed on the sides of the gate. The source and drain are then implanted using the gate and side wall spacers as an implant mask. The heavily doped source and drain regions are spaced from the gate by the width of the side wall spacers, which is determined by the thickness of the side wall spacer material deposited before directional etching. The device breakdown voltage is thus improved.
It would be highly desirable to utilize side wall spacers in the fabrication of additional semiconductor devices.
It is a purpose of the present invention to provide a new and improved electrode structure for semiconductor devices.
It is another purpose of the present invention to provide a new and improved electrode structure for new and improved semiconductor devices.
It is a further purpose of the present invention to provide a new and improved electrode structure for semiconductor devices which is easy to fabricate and which is useful in the fabrication of multiple threshold voltage transistors, memory devices, etc.